The present disclosure relates to processes and architectures for packaging electronic devices.
Various methods have been proposed for packaging of electronic devices, particularly microelectromechanical systems (MEMS) and optical microelectromechanical systems (micro-opto-electro-mechanical systems) (MOEMS). Current designs use various thicknesses of metals (e.g. gold-tin alloys) configured as a bond ring between silicon wafers and glass wafers.
Providing metal bond rings having thicknesses greater than a few microns may cause throughput issues in the normal fabrication operations if one component of assembly requires significantly longer time than another to complete, on a wafer-basis. Even where all of the layers in the bonding are sputter deposited metals on the order of less than 1 μm thick, issues of throughput may arise.
Additionally, under certain circumstances, metal bond rings may result in structural non-uniformities due, in part, to the soldering operation employed to achieve the bond between the respective glass and silicon substrates. Additionally, metal bond rings tend to have a coefficient of thermal expansion that may differ from the glass substrate. The mismatch in the coefficients of thermal expansion may cause stress at the glass-bond ring junction as a result of differences in expansion and contraction characteristics. Such anomalies may be undesirable in various electronic devices.